1. Technical Field
Embodiments of the present invention generally relate to a semiconductor device and an operating method thereof, and more particularly to a semiconductor device capable of adjusting refresh period at an address of a semiconductor memory device by monitoring error handling information at the address of the semiconductor memory device and an operating method thereof.
2. Related Art
A semiconductor memory device such as a dynamic random-access memory (DRAM) may be controlled by a memory controller. And the memory controller may comprise a refresh controller controlling refresh operations of the semiconductor memory device.
The refresh controller sends a refresh request to an arbiter in the memory controller every refresh period, for example 64 ms. If the arbiter receives the refresh request the arbiter process the refresh request before other read or write requests from a host.
Since the memory controller according to a prior art controls refresh operations with the same refresh period throughout the entire region of the semiconductor memory device, it cannot deal with errors caused by deterioration of data retention characteristics at randomly located memory cells of the semiconductor memory device.